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lt1965 1 1965f output current (a) 0 0 dropout voltage (mv) 100 200 300 0.2 0.4 0.6 0.8 1 400 50 150 250 350 1.2 1965 ta01b t j = 25 c typical application features applications description 1.1a, low noise, low dropout linear regulator the lt ? 1965 is a low noise, low dropout linear regulator. the device supplies 1.1a of output current with a 290mv typical dropout voltage. operating quiescent current is 500a, reducing to <1a in shutdown. quiescent current is well controlled; it does not rise in dropout as with many other regulators. the lt1965 regulator has very low out- put noise which makes it ideal for sensitive rf and dsp supply applications. output voltage ranges from 1.20v to 19.5v. the lt1965 regulator is stable with output capacitors as low as 10f. internal protection circuitry includes reverse battery pro- tection, current limiting with foldback, thermal limiting and reverse current protection. the lt1965 is available as an adjustable device with a 1.20v reference voltage. the package offering includes the 5-lead to-220, 5-lead dd-pak as well as the thermally enhanced 8-lead msop and 8-lead 3mm 3mm dfn. 3.3v to 2.5v regulator output current: 1.1a dropout voltage: 290mv low noise: 40 v rms (10hz to 100khz) 500a quiescent current wide input voltage range: 1.8v to 20v no protection diodes needed controlled quiescent current in dropout adjustable output from 1.20v to 19.5v < 1a quiescent current in shutdown stable with 10f output capacitor stable with ceramic, tantalum or aluminum electrolytic capacitors reverse battery protection no reverse current current limit with foldback protection thermal limiting 5-lead to-220, dd-pak, thermally enhanced 8-lead msop and 8-lead 3mm 3mm dfn packages logic power supplies post regulator for switching supplies low noise instrumentation , lt, ltc and ltm are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. dropout voltage in shdn 10 f* *ceramic, tantalum or aluminum electrolytic 1965 ta01 out v in > 3v to 20v adj gnd lt1965 2.5v 1.1a 10 f* + + 5.11k 1% 4.75k 1%
lt1965 2 1965f absolute maximum ratings in pin voltage .........................................................22v out pin voltage ......................................................22v input to output differential voltage (note 2) ......... 22v adj pin voltage ........................................................9v } s } h } d } n pin voltage ...................................................22v output short-circuit duration .......................... inde? nite (note 1) top view dd package 8-lead (3mm 3mm) plastic dfn 5 6 7 8 9 4 3 2 1 out out adj gnd in in shdn gnd t jmax = 125c, e ja = 65c/w exposed pad (pin 9) is gnd, must be soldered to pcb 1 2 3 4 out out adj gnd 8 7 6 5 9 in in shdn gnd top view ms8e package 8-lead plastic msop t jmax = 125c, e ja = 60c/w exposed pad (pin 9) is gnd, must be soldered to pcb q package 5-lead plastic dd-pak front view adj out gnd in shdn tab is gnd 5 4 3 2 1 t jmax = 125c, e ja = 30c/w t package 5-lead plastic to-220 adj out gnd in shdn front view 5 4 3 2 1 tab is gnd t jmax = 125c, e ja = 50c/w pin configuration order information operating junction temperature range (e, i grade) (notes 2, 13) ......................................?40c to 125c storage temperature range ...................?65c to 150c lead temperature (soldering, 10 sec) (only for msop, to-220, dd-pak packages) ... 300c lead free finish tape and reel part marking* package description temperature range lt1965edd#pbf lt1965edd#trpbf LCXW 8-lead (3mm 3mm) plastic dfn ?40c to 125c lt1965ems8e#pbf lt1965ems8e#trpbf ltcxx 8-lead plastic msop ?40c to 125c lt1965eq#pbf lt1965eq#trpbf lt1965q 5-lead plastic dd-pak ?40c to 125c lt1965et#pbf lt1965et#trpbf lt1965t 5-lead plastic to-220 ?40c to 125c lt1965idd#pbf lt1965idd#trpbf LCXW 8-lead (3mm 3mm) plastic dfn ?40c to 125c lt1965ims8e#pbf lt1965ims8e#trpbf ltcxx 8-lead plastic msop ?40c to 125c lt1965iq#pbf lt1965iq#trpbf lt1965q 5-lead plastic dd-pak ?40c to 125c lt1965it#pbf lt1965it#trpbf lt1965t 5-lead plastic to-220 ?40c to 125c consult ltc marketing for parts speci? ed with wider operating temperature ranges. *temperature grades are identi? ed by a label on the shipping container. consult ltc marketing for information on non-standard lead based ? nish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel speci? cations, go to: http://www.linear.com/tapeandreel/
lt1965 3 1965f electrical characteristics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: absolute maximum input to output differential voltage is not achievable with all combinations of rated in pin and out pin voltages. with the in pin at 22v, the out pin may not be pulled below 0v. the total measured voltage from in to out must not exceed 22v. note 3: the lt1965 is tested and speci? ed under pulse load conditions such that t j ? t a . the lt1965e is 100% tested at t a = 25c. performance at C40c and 125c is assured by design, characterization, and correlation with statistical process controls. the lt1965i is guaranteed over the full C40c to 125c operating junction temperature range. note 4: the lt1965 is tested and speci? ed for these conditions with the adj connected to the out pin. parameter conditions min typ max units minimum input voltage (notes 4, 12) i load = 0.5a i load = 1.1a 1.65 1.8 2.3 v v adj pin voltage (notes 4, 5) v in = 2.1v, i load = 1ma 2.3v < v in < 20v, 1ma < i load < 1.1a 1.182 1.164 1.20 1.20 1.218 1.236 v v line regulation (note 4) v in = 2.1v to 20v, i load = 1ma 38 mv load regulation v in = 2.3v, i load = 1ma to 1.1a v in = 2.3v, i load = 1ma to 1.1a 4.25 8 16 mv mv dropout voltage v in = v out(nominal) (notes 6, 7, 12) i load = 1ma i load = 1ma 0.05 0.08 0.14 v v i load = 100ma i load = 100ma 0.10 0.175 0.28 v v i load = 500ma i load = 500ma 0.19 0.25 0.36 v v i load = 1.1a i load = 1.1a 0.29 0.36 0.49 v v gnd pin current v in = v out(nominal) + 1v (notes 6, 8) i load = 0ma i load = 1ma i load = 100ma i load = 500ma i load = 1.1a 0.5 0.6 2.2 8.2 21 1.1 1.5 5.5 20 40 ma ma ma ma ma output voltage noise c out = 10f, i load = 1.1a, bw = 10hz to 100khz 40 v rms adj pin bias current (notes 4, 9) 1.3 4.5 a shutdown threshold v out = off to on v out = on to off 0.2 0.85 0.45 2v v ? s ? h ? d ? n pin current (note 10) v ? s ? h ? d ? n = 0v v ? s ? h ? d ? n = 20v 0.01 5.5 1 10 a a quiescent current in shutdown v in = 6v, v ? s ? h ? d ? n = 0v 0.01 1 a ripple rejection v in C v out = 1.5v (avg), v ripple = 0.5v p-p , f ripple = 120hz, i load = 0.75a 57 75 db current limit v in = 7v, v out = 0 v in = v out(nominal) + 1v, v out = -0.1v (note 6) 1.2 2a a input reverse leakage current v in = C20v, v out = 0 1 ma reverse output current (note 11) v out = 1.2v, v in < 1.2v (note 4) 175 400 a the denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. (note 3) note 5: maximum junction temperature limits operating conditions. the regulated output voltage speci? cation does not apply for all possible combinations of input voltage and output current. limit the output current range if operating at the maximum input voltage. limit the input-to-output voltage differential if operating at the maximum output current. note 6: to satisfy minimum input voltage requirements, the lt1965 is tested and speci? ed for these conditions with an external resistor divider (bottom 4.02k, top 4.32k) for an output voltage of 2.5v. the external resistor divider adds 300a of output dc load current. note 7: dropout voltage is the minimum input-to-output voltage differential needed to maintain regulation at a speci? ed output current. in dropout, the output voltage equals: (v in C v dropout ) note 8: gnd pin current is tested with v in = v out(nominal) + 1v and a current source load. gnd pin current increases slightly in dropout. see gnd pin current curves in the typical performance characteristics section.
lt1965 4 1965f output current (a) 0 0 dropout voltage (mv) 100 200 300 0.2 0.4 0.6 0.8 1 400 500 50 150 250 350 450 1.2 1965 g01 t j = 125 c t j = 25 c output current (a) 0 0 guaranteed dropout voltage (mv) 100 200 300 0.2 0.4 0.6 0.8 1 400 500 50 150 250 350 450 1.2 1965 g02 = test points t j = 125 c t j = 25 c 0 dropout voltage (mv) 100 200 300 400 500 50 150 250 350 450 1965 g03 i l = 1.1a i l = 500ma i l = 100ma i l = 1ma temperature ( c) ?0 ?5 0 25 50 75 100 125 0 quiescent current (ma) 0.2 0.4 0.6 0.8 1.0 0.1 0.3 0.5 0.7 0.9 1965 g04 temperature ( c) ?0 ?5 0 25 50 75 100 125 v in = 6v r l = , i l = 0 v shdn = v in 1.182 adj pin voltage (v) 1.190 1.198 1.206 1.218 1.186 1.194 1.202 1.210 1.214 1965 g05 temperature ( c) ?0 ?5 0 25 50 75 100 125 i l = 1ma 0 quiescent current (ma) 0.2 0.4 0.6 0.8 1.0 0.1 0.3 0.5 0.7 0.9 1965 g06 input voltage (v) 016 4 8 12 20 14 2 6 10 18 t j = 25 c r l = 4.02k v shdn = v in typical performance characteristics typical dropout voltage guaranteed dropout voltage dropout voltage quiescent current adj pin voltage quiescent current electrical characteristics note 9: adj pin bias current ? ows into the adj pin. note 10: ? s ? h ? d ? n pin current ? ows into the ? s ? h ? d ? n pin. note 11: reverse output current is tested with the in pin grounded and the out pin forced to the rated output voltage. this current ? ows into the out pin and out of the gnd pin. note 12: for the lt1965, the minimum input voltage speci? cation limits the dropout voltage under some output voltage/load conditions. note 13: this ic includes overtemperature protection that is intended to protect the device during momentary overload conditions. junction temperature will exceed 125c when overtemperature is active. continuous operation above the speci? ed maximum operating junction temperature may impair device reliability.
lt1965 5 1965f 0 current limit (a) 0.5 1.0 1.5 2.0 2.5 1965 g14 input/output differential (v) 016 4 8 12 20 14 2 6 10 18 t j = 125 c t j = ?0 c t j = 25 c v out = ?00mv 0 gnd pin current (ma) 0.4 0.8 1.2 1.6 2.0 0.2 0.6 1.0 1.4 1.8 1965 g07 input voltage (v) 08 246 10 7 135 9 t j = 25 c v shdn = v in *for v out = 1.2v r l = 24 , i l = 50ma* r l = 120 , i l = 10ma* r l = 1.2k, i l = 1ma* 0 gnd pin current (ma) 5 10 15 20 25 1965 g08 input voltage (v) 08 246 10 7 135 9 t j = 25 c v shdn = v in *for v out = 1.2v r l = 1.091 , i l = 1.1a* r l = 2.4 , i l = 500ma* r l = 12 , i l = 100ma* load current (a) 0 0 gnd pin current (ma) 5.00 10.0 15.0 0.2 0.4 0.6 0.8 1.0 20.0 25.0 2.50 7.50 12.5 17.5 22.5 1.2 1965 g09 v in = v out(nominal) + 1v 0 shdn pin threshold (v) 0.2 0.4 0.6 0.8 1.0 0.1 0.3 0.5 0.7 0.9 1965 g10 temperature ( c) ?0 ?5 0 25 50 75 100 125 off to on on to off shdn pin voltage (v) 0 shdn pin input current ( a) 2 4 6 1 3 5 4 8 12 16 20 2 0 6 10 14 18 1965 g11 5.0 shdn pin input current ( a) 5.2 5.4 5.6 5.8 6.0 5.1 5.3 5.5 5.7 5.9 1965 g12 temperature ( c) ?0 ?5 0 25 50 75 100 125 v shdn = 20v 0 adj pin bias current ( a) 1.0 2.0 3.0 4.0 4.5 0.5 1.5 2.5 3.5 1965 g13 temperature ( c) ?0 ?5 0 25 50 75 100 125 0 current limit (a) 1.0 2.0 3.0 0.5 1.5 2.5 1965 g15 temperature ( c) ?0 ?5 0 25 50 75 100 125 v in = 7v v out = 0v gnd pin current gnd pin current gnd pin current vs i load typical performance characteristics ? s ? h ? d ? n pin threshold ? s ? h ? d ? n pin input current ? s ? h ? d ? n pin input current adj pin bias current current limit vs v in Cv out current limit vs temperature
lt1965 6 1965f typical performance characteristics ripple rejection vs temperature minimum input voltage load regulation output noise spectral density rms output noise vs load current (10hz to 100khz) 1.8v 10hz to 100khz output noise reverse output current reverse output current ripple rejection vs frequency output voltage (v) 0 0 reverse output current (ma) 1 2 3 4 5 6 2468 10 1965 g16 t j = 25 c v in = 0v current flows into output pin v out = v adj 0 reverse output current (ma) 0.10 0.20 0.30 0.40 0.50 0.05 0.15 0.25 0.35 0.45 1965 g17 temperature ( c) ?0 ?5 0 25 50 75 100 125 v in = 0v v out = 1.2v 60 ripple rejection (db) 80 100 70 90 1965 g19 temperature ( c) ?0 ?5 0 25 50 75 100 125 i l = 0.75a v in = v out(nominal) + 1v + 0.5 p-p ripple at f = 120hz 0 minimum input voltage (v) 1.0 2.0 2.5 0.5 1.5 1965 g20 temperature ( c) ?0 ?5 0 25 50 75 100 125 i l = 500ma i l = 1.1a i l = 100ma ?6 load regulation (mv) ?2 ? ? 0 ?4 ?0 ? ? 1965 g21 temperature ( c) ?0 ?5 0 25 50 75 100 125 v in = 2.3v i l = 1ma to 1.1a 0.01 0.10 1.00 frequency (hz) 10 output noise spectral density ( v hz) 100 1k 10k 100k 1965 g22 v out = 3.3v v out = 1.2v v out = 1.5v v out = 1.8v v out = 2.5v c out = 10 f i l = 1.1a load current (a) 20 output noise voltage ( v rms ) 30 50 70 80 0.0001 0.01 0.1 10 10 0.001 1 60 40 0 1965 g23 v out = 2.5v v out = 3.3v v out = 1.8v v out = 1.2v c out = 10 f i l = 1.1a v out = 1.5v 400 s/div v out 100 v/div 1965 g24 c out = 10 f i l = 1.1a frequency (hz) 20 ripple rejection (db) 30 50 60 80 90 10 1k 10k 1m 10 100 100k 70 40 0 1965 g18 i l = 0.75a c out = 10 f ceramic v in = v out(nominal) + 1v + 50mv rms ripple
lt1965 7 1965f time ( s) 0 shdn and output voltage (v) 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 80 20 40 60 100 70 10 30 50 90 1965 g26 output shdn v in = 3.3v c out = 10 f ceramic r l = 2.5k, i l = 1ma for v out = 2.5v 0 0.0 ?00 output voltage deviation (mv) load current (a) ?0 0 50 100 0.5 1.0 1.5 10 20 30 40 50 60 70 80 1965 g25 time ( s) v in = 4.3v c in = 10 f ceramic c out = 10 f ceramic v out = 3.3v pin functions out (pins 1, 2 / 1, 2 / 4 / 4): output. this pin supplies power to the load. use a minimum output capacitor of 10f to prevent oscillations. large load transient applica- tions require larger output capacitors to limit peak volt- age transients. see the applications information section for more information on output capacitance and reverse output characteristics. adj (pins 3 / 3 / 5 / 5): adjust. this pin is the input to the error ampli? er. it has a typical bias current of 1.3a that ? ows into the pin. the adj pin voltage is 1.20v referenced to ground. gnd (pins 4, 5 / 4, 5 / 3 / 3): ground. for the adjustable lt1965, connect the bottom of the resistor divider, setting output voltage, directly to gnd for optimum regulation. ? s ? h ? d ? n (pin 6 / 6 / 1 / 1): shutdown. pulling the ? s ? h ? d ? n pin low puts the lt1965 into a low power state and turns the output off. drive the ? s ? h ? d ? n pin with either logic or an open collector/drain with a pull-up resistor. the resistor sup- plies the pull-up current to the open collector/drain logic, normally several microamperes and the ? s ? h ? d ? n pin current, typically less than 6a. if unused, connect the ? s ? h ? d ? n pin to v in . the lt1965 will be in its low power shutdown state if the ? s ? h ? d ? n pin is not connected. the ? s ? h ? d ? n pin cannot be driven below gnd unless it is tied to the in pin. if the ? s ? h ? d ? n pin is driven below gnd while in is powered, the output will turn on. ? s ? h ? d ? n pin logic cannot be referenced to a negative supply rail. in (pins 7, 8 / 7, 8 / 2 / 2): input. this pin supplies power to the device. the lt1965 requires a bypass capacitor at in if located more than six inches from the main input ? lter capacitor. include a bypass capacitor in battery-powered circuits as a batterys output impedance generally rises with frequency. a bypass capacitor in the range of 1f to 10f suf? ces. the lt1965s design withstands reverse voltages on the in pin with respect to ground and the out pin. in the case of a reversed input, which occurs if a battery is plugged in backwards, the lt1965 behaves as if a diode is in series with its input. no reverse current ? ows into the lt1965 and no reverse voltage appears at the load. the device protects itself and the load. exposed pad (pin 9 / 9, dfn and msop packages only): ground. tie this pin directly to pins 4 and 5 and the pcb ground. this pin provides enhanced thermal performance with its connection to the pcb ground. see the applica- tions information section for thermal considerations and calculating junction temperature. (dfn/msop/dd-pak/to-220) transient response ? s ? h ? d ? n transient response typical performance characteristics
lt1965 8 1965f applications information the lt1965 is a 1.1a low dropout regulator with shut- down. the device is capable of supplying 1.1a at a typical dropout voltage of 290mv. the low operating quiescent current (500a) drops to less than 1a in shutdown. in addition to its low quiescent current, the lt1965 regulator incorporates several protection features that make it ideal for use in battery-powered systems. the device protects itself against both reverse input and reverse output volt- ages. in battery backup applications, if a backup battery holds up the output when the input is pulled to ground, the lt1965 performs like it has a diode in series with its output, preventing reverse current ? ow. also, in dual sup- ply applications where the regulator load is returned to a negative supply, the output can be pulled below ground by as much as 20v. the lt1965 still starts and operates normally in this situation. adjustable operation the lt1965 has an output voltage range of 1.20v to 20v. figure 1 illustrates that the ratio of two external resistors sets the output voltage. the device servos the output to maintain the adj pin voltage at 1.20v referenced to ground. r1s current equals 1.20v/r1. r2s current equals r1s current plus the adj pin bias current. the adj pin bias current, 1.3a at 25c, ? ows through r2 into the adj pin. use the formula in figure 1 to calculate output voltage. linear technology recommends that r1s value be less than 12.1k to minimize output voltage errors due to the adj pin bias current. in shutdown, the output turns off and the divider current is zero. for curves depicting adj pin voltage vs temperature and adj pin bias current vs temperature, see the typical performance characteristics section. the adjustable device is tested and speci? ed with the adj pin tied to the out pin for an output voltage of 1.20v. speci? cations for output voltages greater than 1.20v are proportional to the ratio of the desired output voltage to 1.20v: v out /1.20v. for example, load regulation for an output current change of 1ma to 1.1a is typically C4.25mv at v out = 1.20v. at v out = 5v, load regulation is: 5 120 425 1771 v v mv mv . . . = output capacitance the lt1965s design is stable with a wide range of out- put capacitors. the esr of the output capacitor affects stability, most notably with small capacitors. a minimum output capacitor of 10f with an esr of 3 or less is recommended to prevent oscillations. the lt1965 is a low quiescent current device and output load transient response is a function of output capacitance. larger values of output capacitance decrease the peak deviations and provide improved transient response for larger current changes. ceramic capacitors require extra consideration. manufac- turers make ceramic capacitors with a variety of dielectrics, each with different behavior across temperature and applied voltage. the most common dielectrics used are speci? ed with eia temperature characteristic codes of z5u, y5v, x5r and x7r. the z5u and y5v dielectrics provide high c-v products in a small package at low cost, but exhibit strong voltage and temperature coef? cients as shown in figures 2 and 3. when used with a 5v regulator, a 16v 10f y5v capacitor can exhibit an effective value as low as 1f to 2f for the dc bias applied and over the operat- ing temperature range. the x5r and x7r dielectrics yield much more stable characteristics and are more suitable for use as the output capacitor. the x7r type works over a wider temperature range and has better temperature stability whereas x5r is less expensive and is available in higher values. care still must be exercised when using x5r and x7r capacitors; the x5r and x7r codes only specify operating temperature range and maximum capacitance change over temperature. capacitance change due to dc bias with x5r and x7r capacitors is better than y5v and z5u capacitors, but can still be signi? cant enough to drop figure 1. adjustable operation in 1965 f01 r2 out v in v out adj gnd lt1965 r1 + vv r r ir vv i out adj adj ad =+ ? ? ? ? ? ? + = 120 1 2 1 2 120 . . j j ? at c output range v to v = = 13 25 120 195 . ..
lt1965 9 1965f applications information capacitor values below appropriate levels. capacitor dc bias characteristics tend to improve as component case size increases, but expected capacitance at operating voltages should be veri? ed. voltage and temperature coef? cients are not the only sources of problems. some ceramic capacitors have a piezoelectric response. a piezoelectric device generates voltage across its terminals due to mechanical stress, similar to the way a piezoelectric accelerometer or micro- phone works. for a ceramic capacitor, the stress can be induced by vibrations in the system or thermal transients. the resulting voltages produced can cause appreciable amounts of noise. a ceramic capacitor produced the trace in figure 4 in response to light tapping from a pencil. similar vibration induced behavior can masquerade as increased output voltage noise. overload recovery like many ic power regulators, the lt1965 has safe oper- ating area protection. the safe area protection decreases current limit as input-to-output voltage increases and keeps the power transistor inside a safe operating region for all values of input-to-output voltage. the protective design provides some output current at all values of input-to- output voltage up to the device breakdown. when power is ? rst applied, as input voltage rises, the output follows the input, allowing the regulator to start up into very heavy loads. during start-up, as the input voltage is rising, the input-to-output voltage differential is small, allowing the regulator to supply large output currents. with a high input voltage, a problem can occur wherein removal of an output short will not allow the output to recover. figure 2. ceramic capacitor dc bias characteristics figure 3. ceramic capacitor temperature characteristics figure 4. noise resulting from tapping on a ceramic capacitor dc bias voltage (v) change in value (%) 1965 f02 20 0 ?0 ?0 ?0 ?0 100 0 4 8 10 26 12 14 x5r y5v 16 both capacitors are 16v, 1210 case size, 10 f temperature ( c) ?0 40 20 0 ?0 ?0 ?0 ?0 100 25 75 1965 f03 ?5 0 50 100 125 y5v change in value (%) x5r both capacitors are 16v, 1210 case size, 10 f 1ms/div 1mv/div 1965 f04 v out = 1.3v c out = 10 f i load = 0
lt1965 10 1965f other regulators, such as the lt1083/lt1084/lt1085 family, also exhibit this phenomenon, so it is not unique to the lt1965. the problem occurs with a heavy output load when the input voltage is high and the output voltage is low. com- mon situations include immediately after the removal of a short-circuit or if the shutdown pin is pulled high after the input voltage has already been turned on. the load line for such a load may intersect the output current curve at two points. if this happens, there are two stable output operating points for the regulator. with this double intersection, the input power supply may need to be cycled down to zero and brought up again to make the output recover. output voltage noise the lt1965 regulators design provides low output voltage noise over the 10hz to 100khz bandwidth while operating at full load. output voltage noise is approximately 80nv/ ? h ? z over this frequency bandwidth for the lt1965. for higher output voltages (generated by using a resistor divider), the output voltage noise gains up accordingly. higher values of output voltage noise may be measured if care is not exercised with regard to circuit layout and testing. crosstalk from nearby traces can induce unwanted noise onto the lt1965s output. power supply ripple rejec- tion must also be considered; the lt1965 regulator does not have unlimited power supply rejection and will pass a small portion of the input noise through to the output. applications information thermal considerations the lt1965s maximum rated junction temperature of 125c limits its power handling capability. two compon- ents comprise the power dissipated by the device: 1. output current multiplied by the input/output voltage differential: i out ? (v in C v out ), and 2. gnd pin current multiplied by the input voltage: i gnd ? v in gnd pin current is determined using the gnd pin current curves in the typical performance characteristics section. power dissipation equals the sum of the two components listed. the lt1965 regulator has internal thermal limiting that protects the device during overload conditions. for con- tinuous normal conditions, do not exceed the maximum junction temperature rating of 125c. carefully consider all sources of thermal resistance from junction to ambi- ent including other heat sources mounted in proximity to the lt1965. the underside of the lt1965 dfn package has exposed metal (4mm 2 ) from the lead frame to the die attachment. the underside of the lt1965 msop package also has ex- posed metal (2mm 2 ). both packages allow heat to directly transfer from the die junction to the printed circuit board metal to control maximum operating junction temperature. the dual-in-line pin arrangement allows metal to extend beyond the ends of the package on the topside (component side) of a pcb. connect this metal to gnd on the pcb. the multiple in and out pins of the lt1965 also assist in spreading heat to the pcb. for surface mount devices, heat sinking is accomplished by using the heat spreading capabilities of the pc board and its copper traces. copper board stiffeners and plated through-holes can also be used to spread the heat gener- ated by power devices.
lt1965 11 1965f applications information the following tables list thermal resistance for several different board sizes and copper areas. all measurements were taken in still air on 1/16" fr-4 board with one ounce copper. table 1. measured thermal resistance for dfn package copper area thermal resistance topside* backside board area (junction-to-ambient) 2500mm 2 2500mm 2 2500mm 2 60c/w 1000mm 2 2500mm 2 2500mm 2 62c/w 225mm 2 2500mm 2 2500mm 2 65c/w 100mm 2 2500mm 2 2500mm 2 68c/w 50mm 2 2500mm 2 2500mm 2 70c/w *device is mounted on topside table 2. measured thermal resistance for msop package copper area thermal resistance topside* backside board area (junction-to-ambient) 2500mm 2 2500mm 2 2500mm 2 55c/w 1000mm 2 2500mm 2 2500mm 2 57c/w 225mm 2 2500mm 2 2500mm 2 60c/w 100mm 2 2500mm 2 2500mm 2 65c/w 50mm 2 2500mm 2 2500mm 2 68c/w *device is mounted on topside table 3. measured thermal resistance for dd-pak package copper area thermal resistance topside* backside board area (junction-to-ambient) 2500mm 2 2500mm 2 2500mm 2 25c/w 1000mm 2 2500mm 2 2500mm 2 30c/w 125mm 2 2500mm 2 2500mm 2 35c/w *device is mounted on topside measured thermal resistance for to-220 package thermal resistance (junction-to-case) = 3c/w calculating junction temperature example: given an output voltage of 2.5v, an input voltage range of 3.3v 5%, an output current range of 0ma to 500ma and a maximum ambient temperature of 85c, what will the maximum junction temperature be? the power dissipated by the device equals: i out(max) ? (v in(max) C v out ) + i gnd ? v in(max) where: i out(max) = 500ma v in(max) = 3.465v i gnd at (i out = 500ma, v in = 3.465v) = 8.2ma so, p = 500ma(3.465v C 2.5v) + 8.2ma(3.465v) = 0.511w using a dfn package, the thermal resistance will be in the range of 60c/w to 70c/w depending on the cop- per area. so the junction temperature rise above ambient approximately equals: 0.511w ? 65c/w = 33.22c the maximum junction temperature equals the maximum ambient temperature plus the maximum junction tempera- ture rise above ambient or: t jmax = 85c + 33.22c = 118.22c
lt1965 12 1965f output voltage (v) 0 0 reverse output current (ma) 1 2 3 4 5 6 2468 10 1965 f05 t j = 25 c v in = 0v current flows into output pin v out = v adj protection features the lt1965 incorporates several protection features that make it ideal for use in battery-powered circuits. in addition to the normal protection features associated with monolithic regulators, such as current limiting and thermal limiting, the device also protects against reverse input voltages, reverse output voltages and reverse out- put-to-input voltages. current limit protection and thermal overload protection protect the device against current overload conditions at its output. for normal operation, do not exceed the maximum rated junction temperature of 125c. the input of the device withstands reverse voltages of 22v. the lt1965 limits current ? ow to less than 1ma (typically less than 200a) and no negative voltage appears at the output. the device protects both itself and the load against batteries that are plugged in backwards. the lt1965 incurs no damage if its output is pulled below ground. if the input is left open circuit or grounded, the output can be pulled below ground by 22v. for the adjust- able version, the output acts like an open circuit and no current ? ows from the output. however, current ? ows in (but is limited by) the resistor divider that sets the output voltage. if the input is powered by a voltage source, the output sources current equal to its current limit capability and the lt1965 protects itself by thermal limiting. in this case, grounding the ? s ? h ? d ? n pin turns off the device and stops the output from sourcing current. the lt1965 incurs no damage if the adj pin is pulled above or below ground by 9v. if the input is left open circuit or grounded, the adj pin performs like an open circuit when pulled below ground and like a large resistor (typically 5k up to 3v on the adj pin and then 1.5k up to 9v) in series with a diode when pulled above ground. in situations where the adj pin connects to a resistor divider that would pull the adj pin above its 9v clamp volt- age if the output is pulled high, the adj pin input current must be limited to less than 5ma. for example, a resistor divider is used to provide a regulated 1.5v output from the 1.20v reference when the output is forced to 20v. the top resistor of the resistor divider must be chosen to limit the current into the adj pin to less than 5ma when the adj pin is at 9v. the 11v difference between the out and adj pins divided by the 5ma maximum current into the adj pin yields a minimum top resistor value of 2.2k. in circuits where a backup battery is required, several different input/output conditions can occur. the output voltage may be held up while the input is either pulled to ground, pulled to some intermediate voltage, or is left open circuit. current ? ow back into the output follows the curve shown in figure 5. if the lt1965s in pin is forced below the out pin or the out pin is pulled above the in pin, input current typically drops to less than 2a. this occurs if the lt1965 input is connected to a discharged (low voltage) battery and either a backup battery or a second regulator holds up the output. the state of the ? s ? h ? d ? n pin has no effect on the reverse output current if the output is pulled above the input. figure 5. reverse output current applications information
lt1965 13 1965f typical applications r1 0.01 r2 0.01 r5 10k r4 2.2k r7 4.02k 1% c2 22 f 1965 ta03 v in > 3.7v 3.3v 2.2a 8 1 3 2 4 c3 0.01 f in out adj gnd lt1965 shdn in shdn out adj gnd lt1965 shdn + c1 100 f + + 1/2 lt1366 r6 6.65k 1% r3 2.2k r9 4.02k 1% r8 6.98k 1% paralleling of regulators for higher output current
lt1965 14 1965f package description msop (ms8e) 0603 0.53 0.152 (.021 .006) seating plane note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 0.18 (.007) 0.254 (.010) 1.10 (.043) max 0.22 ?0.38 (.009 ?.015) typ 0.127 0.076 (.005 .003) 0.86 (.034) ref 0.65 (.0256) bsc 0 ?6 typ detail ? detail ? gauge plane 12 3 4 4.90 0.152 (.193 .006) 8 8 1 bottom view of exposed pad option 7 6 5 3.00 0.102 (.118 .004) (note 3) 3.00 0.102 (.118 .004) (note 4) 0.52 (.0205) ref 1.83 0.102 (.072 .004) 2.06 0.102 (.081 .004) 5.23 (.206) min 3.20 ?3.45 (.126 ?.136) 2.083 0.102 (.082 .004) 2.794 0.102 (.110 .004) 0.889 0.127 (.035 .005) recommended solder pad layout 0.42 0.038 (.0165 .0015) typ 0.65 (.0256) bsc 3.00 0.10 (4 sides) 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on top and bottom of package note: 1. drawing to be made a jedec package outline m0-229 variation of (weed-1) 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 0.38 0.10 bottom view?xposed pad 1.65 0.10 (2 sides) 0.75 0.05 r = 0.115 typ 2.38 0.10 (2 sides) 1 4 8 5 pin 1 top mark (note 6) 0.200 ref 0.00 ?0.05 (dd) dfn 1203 0.25 0.05 2.38 0.05 (2 sides) recommended solder pad pitch and dimensions 1.65 0.05 (2 sides) 2.15 0.05 0.50 bsc 0.675 0.05 3.5 0.05 package outline 0.25 0.05 0.50 bsc dd package 8-lead plastic dfn (3mm 3mm) (reference ltc dwg # 05-08-1698) ms8e package 8-lead plastic msop (reference ltc dwg # 05-08-1662)
lt1965 15 1965f information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. package description t5 (to-220) 0801 .028 ?.038 (0.711 ?0.965) .067 (1.70) .135 ?.165 (3.429 ?4.191) .700 ?.728 (17.78 ?18.491) .045 ?.055 (1.143 ?1.397) .095 ?.115 (2.413 ?2.921) .013 ?.023 (0.330 ?0.584) .620 (15.75) typ .155 ?.195* (3.937 ?4.953) .152 ?.202 (3.861 ?5.131) .260 ?.320 (6.60 ?8.13) .165 ?.180 (4.191 ?4.572) .147 ?.155 (3.734 ?3.937) dia .390 ?.415 (9.906 ?10.541) .330 ?.370 (8.382 ?9.398) .460 ?.500 (11.684 ?12.700) .570 ?.620 (14.478 ?15.748) .230 ?.270 (5.842 ?6.858) bsc seating plane * measured at the seating plane q package 5-lead plastic dd pak (reference ltc dwg # 05-08-1461) t package 5-lead plastic to-220 (standard) (reference ltc dwg # 05-08-1420) q(dd5) 0502 .028 ?.038 (0.711 ?0.965) typ .143 +.012 ?020 () 3.632 +0.305 0.508 .067 (1.702) bsc .013 ?.023 (0.330 ?0.584) .095 ?.115 (2.413 ?2.921) .004 +.008 ?004 () 0.102 +0.203 0.102 .050 .012 (1.270 0.305) .059 (1.499) typ .045 ?.055 (1.143 ?1.397) .165 ?.180 (4.191 ?4.572) .330 ?.370 (8.382 ?9.398) .060 (1.524) typ .390 ?.415 (9.906 ?10.541) 15 typ .420 .350 .565 .090 .042 .067 recommended solder pad layout .325 .205 .080 .565 .090 recommended solder pad layout for thicker solder paste applications .042 .067 .420 .276 .320 note: 1. dimensions in inch/ (millimeter) 2. drawing not to scale .300 (7.620) .075 (1.905) .183 (4.648) .060 (1.524) .060 (1.524) .256 (6.502) bottom view of dd pak hatched area is solder plated copper heat sink
lt1965 16 1965f linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2007 lt 0807 ? printed in usa related parts typical application part number description comments lt1129 700ma, micropower, ldo v in : 4.2v to 30v, v out(min) = 3.8v, v do = 0.40v, i q = 50a, i sd = 16a; dd, sot-223, s8, to220-5 and tssop20 packages lt1761 100ma, low noise micropower, ldo v in : 1.8v to 20v, v out(min) = 1.22v, v do = 0.30v, i q = 20a, i sd = < 1a, low noise < 20v rms , stable with 1f ceramic capacitors, thinsot? package lt1762 150ma, low noise micropower, ldo v in : 1.8v to 20v, v out(min) = 1.22v, v do = 0.30v, i q = 25a, i sd = < 1a, low noise < 20v rms , ms8 package lt1763 500ma, low noise micropower, ldo v in : 1.8v to 20v, v out(min) = 1.22v, v do = 0.30v, i q = 30a, i sd = < 1a, low noise < 20v rms , s8 package lt1764/lt1764a 3a, low noise, fast transient response, ldo v in : 2.7v to 20v, v out(min) = 1.21v, v do = 0.34v, i q = 1ma, i sd = < 1a, low noise < 40v rms , a version stable with ceramic capacitors, dd and to220-5 packages ltc1844 150ma, very low drop-out ldo v in : 1.6v to 6.5v, v out(min) = 1.25v, v do = 0.08v, i q = 35a, i sd = < 1a, low noise < 60v rms , thinsot? package lt1962 300ma, low noise micropower, ldo v in : 1.8v to 20v, v out(min) = 1.22v, v do = 0.27v, i q = 30a, i sd = < 1a, low noise < 20v rms , ms8 package lt1963/lt1963a 1.5a, low noise, fast transient response, ldo v in : 2.1v to 20v, v out(min) = 1.21v, v do = 0.34v, i q = 1ma, i sd = < 1a, low noise < 40v rms , a version stable with ceramic capacitors; dd, to220-5, sot-223 and s8 packages lt3020 100ma, low voltage v do , v in(min) = 0.9v, ldo v in : 0.9v to 10v, v out(min) = 0.20v, v do = 0.15v, i q = 120a, i sd = 3a, dfn and ms8 packages lt3021 500ma, low voltage v do , v in(min) = 0.9v, ldo v in : 0.9v to 10v, v out(min) = 0.20v, v do = 0.16v, i q = 120a, i sd = 3a, dfn and s8 packages lt3023 dual, 2x 100ma, low noise micropower, ldo v in : 1.8v to 20v, v out(min) = 1.22v, v do = 0.30v, i q = 40a, i sd = < 1a, dfn and ms10 packages lt3024 dual, 100ma/500ma, low noise micropower, ldo v in : 1.8v to 20v, v out(min) = 1.22v, v do = 0.30v, i q = 60a, i sd = < 1a, dfn and tssop packages lt3027 dual, 2x 100ma, low noise micropower, ldo with independent inputs v in : 1.8v to 20v, v out(min) = 1.22v, v do = 0.30v, i q = 25a, i sd = < 1a, low noise < 20v rms , dfn and ms10 packages lt3028 dual, 100ma/500ma, low noise micropower, ldo with independent inputs v in : 1.8v to 20v, v out(min) = 1.22v, v do = 0.30v, i q = 30a, i sd = < 1a, low noise < 20v rms , dfn and tssop packages thinsot is a trademark of linear technology corporation adjustable current source + lt1004-1.2 v in > 2.7v c1 10 f + c4 10 f r3 2k r1 1k r2 80.6k r4 2.2k r5, 0.01 r6 2.2k lt1965 in shdn out adj gnd + 1/2 lt1366 r8 100k load r7 470 2 1 8 3 4 c3 1 f c2 3.3 f 1965 ta04 note: adjust r1 for 0a to 1.1a constant-current

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